- Low-power heterogeneous architectures for efficient and predictable autonomous cyber-physical systems
- Valente, Luca <1996>
Subject
- ING-INF/01 Elettronica
Description
- In today’s rapidly evolving technological landscape, cyber-physical systems have pervaded various aspects of our daily lives, from autonomous vehicles and healthcare to industrial automation and smart cities. Such applications span a wide range in criticality, performance, and memory footprint, under tight cost and power constraints. High-end applications rely on power-hungry Systems-on-Chip (SoCs) featuring powerful processors, large LPDDR/DDR3/4/5 memories, and supporting full-fledged Operating Systems (OS). On the contrary, low-end applications typically rely on Ultra-Low-Power µcontrollers with a "close to metal" software environment and simple real-time micro-kernel-based runtimes. Emerging applications and trends of cyber-physical systems require the "best of both worlds": cheap and low-power SoC systems able to (i) run increasingly complex multi-tasking workloads with large memory footprints within a few hundred mW power budget, (ii) offer a well-known and agile software environment based on full-fledged OS while (iii) providing extreme energy efficient processing capabilities and (iv) not compromising on time-predictability. In this context, this work presents a threefold contribution. First, the thesis introduces Shaheen, a 22nm low-power (<200mW) heterogeneous SoC designed for autonomous nano-unmanned aerial vehicles, an emerging class of cyber-physical systems. Shaheen features an application-class RV64 host processor with hardware virtualization support, enabling the secure consolidation of a real-time and a full-blown OS onto the same platform. Furthermore, it integrates a flexible cluster of eight RV32 cores, providing state-of-the-art energy-efficient performance for low-power artificial intelligence algorithms. Secondly, this work discusses enhancements to Shaheen’s memory hierarchy, demonstrating the trade-off between low-power and high-end off-chip memories. Lastly, it focuses on the time predictability of AXI-based architectures in safety-critical applications. Namely, it introduces (i) a novel fine-grained methodology for modeling the typical resources composing modern heterogeneous SoCs and (ii) a complete mathematical analysis to upper bound the response time of the interactions between the agents in the system.
Date
- 2024-03-22
- info:eu-repo/date/embargoEnd/2026-06-31
Type
- Doctoral Thesis
- PeerReviewed
Format
- application/pdf
Identifier
urn:nbn:it:unibo-30240
Valente, Luca (2024) Low-power heterogeneous architectures for efficient and predictable autonomous cyber-physical systems, [Dissertation thesis], Alma Mater Studiorum Università di Bologna. Dottorato di ricerca in Ingegneria elettronica, telecomunicazioni e tecnologie dell'informazione